Association in the same chip of vertical current flow MOS power transistors and an integrated control circuit provides a very compact and efficient device which is advantageous compared with separate components.
A recurring problem in providing such a device is maximization of the breakdown voltage, which is a decreasing function of the dopant concentration in the power stage drain region and an increasing function of the curvature radius of the body/drain junction thereof. At present the problem is solved by appropriate terminations of the junction, such as dielectric and/or metallic field plates, floating rings, low dopant concentration regions, etc. A review of these techniques can be found in "Physics of semiconductor devices" by A. Blicher, Rep. Prog. Phys., Vol. 45, 1982, pages 446-450.
The limits of these solutions are essentially that a) the termination region extends for distances even greater than 100 microns and this involves considerable waste of area, b) other manufacturing steps are added to the process and the cost of the device is thus increased, and c) the surface electric field is equal to, if not greater than, the electric field at the junction and, consequently, the reliability of the structure is poor (the process of passivation and/or encapsulation of the device can further reduce breakdown voltage).